Real Intent offers two product families – Ascent for early functional verification before synthesis; and Meridian for advanced sign-off verification not possible with simulation or static timing analysis.
Claytronics expertise encompasses all phases of the development lifecycle leveraged with excellent embedded system knowledge for end-to-end product solution.
Ascent for Early Functional Verification
Ascent Lint is the industry’s fastest and lowest-noise RTL lint solution. It includes smart rules that perform syntax and semantic checks for today’s complex System-on-Chip (SoC) designs. Ascent Lint is unique in the industry in terms of delivering high capacity, comprehensiveness and ease of debug.
Ascent AutoFormal is an early functional verification tool that automatically finds elusive bugs in RTL. It performs comprehensive verification using automatic check formulation followed by deep-sequential formal analysis. Ascent Autoformal can improve verification efficiency substantially and detect up to 50% of design functional errors prior to testbench development and simulation. It is the only automatic formal tool with root cause analysis, drastically reducing the debug time and the number of iterations necessary to get to functional closure.
Ascent X-Verification System (XV) addresses X-propagation issues, including isolating potential X-optimism at RTL and the correction of unnecessary X’s (X-pessimism) in Netlist. Eliminating X-optimism at RTL makes the transition to FPGA-modeling much faster by making the RTL simulations hardware accurate. Ascent XV also makes the transition to gate level simulation faster by identifying and correcting pessimism in gate level simulations. Ascent XV drives cost down by avoiding the monotonous, error-prone debug at the netlist level or within an FPGA model.
Meridian for Advanced Sign-off Verification
Meridian CDC is the fastest, highest capacity and most precise CDC solution in the market. It performs comprehensive structural and functional analysis to ensure that signals crossing asynchronous clock domains on ASIC, or FPGA devices are received reliably. With giga-gate capacity, Meridian CDC is the only solution that enables all aspects of CDC sign-off.
Meridian RDCis the fastest and most precise reset domain crossing sign-off tool in the market. It performs comprehensive static analysis to ensure that signals crossing reset domains function reliably. Among other things, Meridian RDC identifies metastability problems arising from software and/or low power resets. Meridian RDC is the only solution that enables comprehensive reset domain crossing sign-off.
Meridian Constraints is the best in class, comprehensive constraint management solution in the market. It offers high performance constraint validation, template generation, coverage analysis, equivalence checking and timing exception verification capabilities designed to provide users with ultimate confidence in the timing constraints employed across all phases of the implementation flow.